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rev. e information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective companies. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781/329-4700 www.analog.com fax: 781/326-8703 2003 ? analog devices, inc. all rights reserved. ad822 single-supply, rail-to-rail low power fet-input op amp features true single-supply operation output swings rail-to-rail input voltage range extends below ground single-supply capability from 3 v to 36 v dual-supply capability from 1.5 v to 18 v high load drive capacitive load drive of 350 pf, g = +1 minimum output current of 15 ma excellent ac performance for low power 800 a max quiescent current per amplifier unity gain bandwidth: 1.8 mhz slew rate of 3.0 v/ms good dc performance 800 v max input offset voltage 2 v/ c typ offset voltage drift 25 pa max input bias current low noise 13 nv/ hz @ 10 khz no phase inversion applications battery-powered precision instrumentation photodiode preamps active filters 12- to 14-bit data acquisition systems medical instrumentation low power references and regulators connection diagram 8-lead plastic dip, msop, and soic 1 2 3 4 8 7 6 5 ad822 out1 ?in1 +in1 v? v+ out2 ?in2 +in2 general description the ad822 is a dual precision, low power fet input op amp that can operate from a single supply of 3.0 v to 36 v or dual supplies of 1.5 v to 18 v. it has true single-supply capability with an input voltage range extending below the negative rail, allowing the ad822 to accommodate input signals below ground in the single-supply mode. output voltage swing extends to within 10 mv of each rail providing the maximum output dy namic range. offset voltage of 800 m v maximum, offset voltage drift of 2 m v/ c, input bias currents below 25 pa, and low input voltage noise provide dc precision with source impedances up to a gigaohm. 1.8 mhz unity gain bandwidth, ?3 db thd at 10 khz, and 3v/ m s slew rate are provided with a low supply current of 800 m a per amplifier. the ad822 drives up to 350 pf of direct capacitive load as a follower and provides a minimum output current of 15 ma. this allows the amplifier to handle a wide range of load conditions. its combination of ac and dc performance, plus the outstanding load drive capability, results in an exceptionally versatile amplifier for the single-supply user. the ad822 is available in two performance grades. the a and b grades are rated over the industrial temperature range of ?0 c to +85 c. the ad822 is offered in three varieties of 8-lead packages: plastic pdip, msop, and soic. frequency ? hz 1 10 10k 1k 100 input voltage noise ? nv/ h z 100 10 figure 1. input voltage noise vs. frequency 90 100 10 0% . . . . . . . . . . . . .. . . .. . . .. . . . . . . . . . . .. . . .. . . . . . . . . . . . . . . .. . . .. . . .. . . . . . . . . . . .. . . .. . . . (gnd) v out 5v 0v 1v 20s 1v 1v figure 2. gain-of-2 amplifier; v s = 5, 0, v in = 2.5 v sine centered at 1.25 v, r l = 100 k w
rev. e ? ad822?pecifications (v s = 0, 5 v @ t a = 25 c, v cm = 0 v, v out = 0.2 v, unless otherwise noted.) ad822a ad822b parameter conditions min typ max min typ max unit dc performance initial offset 0.1 0.8 0.1 0.4 mv max offset over temperature 0.5 1.2 0.5 0.9 mv offset drift 22 m v/ c input bias current v cm = 0 v to 4 v 2 25 2 10 pa at t max 0.5 5 0.5 2.5 na input offset current 2 20 2 10 pa at t max 0.5 0.5 na open-loop gain v o = 0.2 v to 4 v r l = 100 k w 500 1000 500 1000 v/mv t min to t max 400 400 v/mv r l = 10 k w 80 150 80 150 v/mv t min to t max 80 80 v/mv r l = 1 k w 15 30 15 30 v/mv t min to t max 10 10 v/mv noise/harmonic performance input voltage noise 0.1 hz to 10 hz 2 2 m v p-p f = 10 hz 25 25 nv/ hz f = 100 hz 21 21 nv/ hz f = 1 khz 16 16 nv/ hz f = 10 khz 13 13 nv/ hz input current noise 0.1 hz to 10 hz 18 18 fa p-p f = 1 khz 0.8 0.8 fa/ hz harmonic distortion r l = 10 k w to 2.5 v f = 10 khz v o = 0.25 v to 4.75 v 93 ?3 db dynamic performance unity gain frequency 1.8 1.8 mhz full power response v o p-p = 4.5 v 210 210 khz slew rate 33v/ m s settling time to 0.1% v o = 0.2 v to 4.5 v 1.4 1.4 m s to 0.01% 1.8 1.8 m s matching characteristics initial offset 1.0 0.5 mv max offset over temperature 1.6 1.3 mv offset drift 3 3 m v/ c input bias current 20 10 pa crosstalk @ f = 1 khz r l = 5 k w ?30 ?30 db f = 100 khz ?3 ?3 db input characteristics input voltage range 1 ?.2 +4 ?.2 +4 v t min to t max ?.2 +4 ?.2 +4 v common-mode rejection ratio (cmrr) v cm = 0 v to 2 v 66 80 69 80 db t min to t max v cm = 0 v to 2 v 66 66 db input impedance differential 10 13 0.5 10 13 0.5 w pf common mode 10 13 2.8 10 13 2.8 w pf output characteristics output saturation voltage 2 v ol ? ee i sink = 20 m a5757mv t min to t max 10 10 mv v cc ? oh i source = 20 m a1014 1 014 mv t min to t max 20 20 mv v ol ? ee i sink = 2 ma 40 55 40 55 mv t min to t max 80 80 mv v cc ? oh i source = 2 ma 80 110 80 110 mv t min to t max 160 160 mv v ol ? ee i sink = 15 ma 300 500 300 500 mv t min to t max 1000 1000 mv v cc ? oh i source = 15 ma 800 1500 800 1500 mv t min to t max 1900 1900 mv operating output current 15 15 ma t min to t max 12 12 ma capacitive load drive 350 350 pf power supply quiescent current t min to t max 1.24 1.6 1.24 1.6 ma power supply rejection v s + = 5 v to 15 v 66 80 70 80 db t min to t max 66 70 db specifications subject to change without notice.
rev. e ad822 ? ad822a ad822b parameter conditions min typ max min typ max unit dc performance initial offset 0.1 0.8 0.1 0.4 mv max offset over temperature 0.5 1.5 0.5 1 mv offset drift 22 m v/ c input bias current v cm = ? v to +4 v 2 25 2 10 pa at t max 0.5 5 0.5 2.5 na input offset current 2 20 2 10 pa at t max 0.5 0.5 na open-loop gain v o = ? v to +4 v r l = 100 k w 400 1000 400 1000 v/mv t min to t max 400 400 v/mv r l = 10 k w 80 150 80 150 v/mv t min to t max 80 80 v/mv r l = 1 k w 20 30 20 30 v/mv t min to tmax 10 10 v/mv noise/harmonic performance input voltage noise 0.1 hz to 10 hz 2 2 m v p-p f = 10 hz 25 25 nv/ hz f = 100 hz 21 21 nv/ hz f = 1 khz 16 16 nv/ hz f = 10 khz 13 13 nv/ hz input current noise 0.1 hz to 10 hz 18 18 fa p-p f = 1 khz 0.8 0.8 fa/ hz harmonic distortion r l = 10 k w f = 10 khz v o = 4.5 v ?3 ?3 db dynamic performance unity gain frequency 1.9 1.9 mhz full power response v o p-p = 9 v 105 105 khz slew rate 33v/ m s settling time to 0.1% v o = 0 v to 4.5 v 1.4 1.4 m s to 0.01% 1.8 1.8 m s matching characteristics initial offset 1.0 0.5 mv max offset over temperature 3 2 mv offset drift 33 m v/ c input bias current 25 10 pa crosstalk @ f = 1 khz r l = 5 k w ?30 ?30 db f = 100 khz ?3 ?3 db input characteristics input voltage range 1 ?.2 +4 ?.2 +4 v t min to t max ?.2 +4 ?.2 +4 v common-mode rejection ratio (cmrr) v cm = ? v to +2 v 66 80 69 80 db t min to t max v cm = ? v to +2 v 66 66 db input impedance differential 10 13 0.5 10 13 0.5 w pf common mode 10 13 2.8 10 13 2.8 w pf output characteristics output saturation voltage 2 v ol ? ee i sink = 20 m a5757mv t min to t max 10 10 mv v cc ? oh i source = 20 m a10141 014 mv t min to t max 20 20 mv v ol ? ee i sink = 2 ma 40 55 40 55 mv t min to t max 80 80 mv v cc ? oh i source = 2 ma 80 110 80 110 mv t min to t max 160 160 mv v ol ? ee i sink = 15 ma 300 500 300 500 mv t min to t max 1000 1000 mv v cc ? oh i source = 15 ma 800 1500 800 1500 mv t min to t max 1900 1900 mv operating output current 15 15 ma t min to t max 12 12 ma capacitive load drive 350 350 pf power supply quiescent current t min to t max 1.3 1.6 1.3 1.6 ma power supply rejection v s + = 5 v to 15 v 66 80 70 80 db t min to t max 66 70 db specifications subject to change without notice. specifications (v s = 5 v @ t a = 25 c, v cm = 0 v, v out = 0 v, unless otherwise noted.)
rev. e ? ad822 ad822a ad822b parameter conditions min typ max min typ max unit dc performance initial offset 0.4 2 0.3 1.5 mv max offset over temperature 0.5 3 0.5 2.5 mv offset drift 22 m v/ c input bias current v cm = 0 v 2 25 2 12 pa v cm = ?0 v 40 40 pa at t max v cm = 0 v 0.5 5 0.5 2.5 na input offset current 2 20 2 12 pa at t max 0.5 0.5 na open-loop gain v o = +10 v to ?0 v r l = 100 k w 500 2000 500 2000 v/mv t min to t max 500 500 v/mv r l = 10 k w 100 500 100 500 v/mv t min to t max 100 100 v/mv r l = 1 k w 30 45 30 45 v/mv t min to t max 20 20 v/mv noise/harmonic performance input voltage noise 0.1 hz to 10 hz 2 2 m v p-p f = 10 hz 25 25 nv/ hz f = 100 hz 21 21 nv/ hz f = 1 khz 16 16 nv/ hz f = 10 khz 13 13 nv/ hz input current noise 0.1 hz to 10 hz 18 18 fa p-p f = 1 khz 0.8 0.8 fa/ hz harmonic distortion r l = 10 k w f = 10 khz v o = 10 v ?5 ?5 db dynamic performance unity gain frequency 1.9 1.9 mhz full power response v o p-p = 20 v 45 45 khz slew rate 33v/ m s settling time to 0.1% v o = 0 v to 10 v 4.1 4.1 m s to 0.01% 4.5 4.5 m s matching characteristics initial offset 32mv max offset over temperature 4 2.5 mv offset drift 33 m v/ c input bias current 25 12 pa crosstalk @ f = 1 khz r l = 5 k w ?30 ?30 db f = 100 khz ?3 ?3 db input characteristics input voltage range 1 ?5.2 +14 ?5.2 +14 v t min to t max ?5.2 +14 ?5.2 +14 v common-mode rejection ratio (cmrr) v cm = ?5 v to +12 v 70 80 74 90 db t min to t max v cm = ?5 v to +12 v 70 74 db input impedance differential 10 13 0.5 10 13 0.5 w pf common mode 10 13 2.8 10 13 2.8 w pf output characteristics output saturation voltage 2 v ol ? ee i sink = 20 m a5757mv t min to t max 10 10 mv v cc ? oh i source = 20 m a10141 014 mv t min to t max 20 20 mv v ol ? ee i sink = 2 ma 40 55 40 55 mv t min to t max 80 80 mv v cc ? oh i source = 2 ma 80 110 80 110 mv t min to t max 160 160 mv v ol ? ee i sink = 15 ma 300 500 300 500 mv t min to t max 1000 1000 mv v cc ? oh i source = 15 ma 800 1500 800 1500 mv t min to t max 1900 1900 mv operating output current 20 20 ma t min to t max 15 15 ma capacitive load drive 350 350 pf power supply quiescent current t min to t max 1.4 1.8 1.4 1.8 ma power supply rejection v s + = 5 v to 15 v 70 80 70 80 db t min to t max 70 70 db specifications subject to change without notice. specifications (v s = 15 v @ t a = 25 c, v cm = 0 v, v out = 0 v, unless otherwise noted.)
rev. e ad822 ? specifications (v s = 0, 3 v @ t a = 25 c, v cm = 0 v, v out = 0.2 v, unless otherwise noted.) parameter conditions typ unit dc performance initial offset 0.2 mv max offset over temperature 0.5 mv offset drift 1 m v/ c input bias current v cm = 0 v to 2 v 2 pa at t max 0.5 na input offset current 2pa at t max 0.5 na open-loop gain v o = 0.2 v to 2 v r l = 100 k w 1000 v/mv r l = 10 k w 150 v/mv r l = 1 k w 30 v/mv noise/harmonic performance input voltage noise 0.1 hz to 10 hz 2 m v p-p f = 10 hz 25 nv/ hz f = 100 hz 21 nv/ hz f = 1 khz 16 nv/ hz f = 10 khz 13 nv/ hz input current noise 0.1 hz to 10 hz 18 fa p-p f = 1 khz 0.8 fa/ hz harmonic distortion r l = 10 k w to 1.5 v f = 10 khz v o = 1.25 v 92 db dynamic performance unity gain frequency 1.5 mhz full power response v o p-p = 2.5 v 240 khz slew rate 3v/ m s settling time to 0.1% v o = 0.2 v to 2.5 v 1 m s to 0.01% 1.4 m s matching characteristics offset drift 2 m v/ c crosstalk @ f = 1 khz r l = 5 k w ?30 db f = 100 khz ?3 db input characteristics cmrr v cm = 0 v to 1 v 74 db input impedance differential 10 13 0.5 w pf common mode 10 13 2.8 w pf output characteristics output saturation voltage 2 v ol ? ee i sink = 20 m a5mv v cc ? oh i source = 20 m a10mv v ol ? ee i sink = 2 ma 40 mv v cc ? oh i source = 2 ma 80 mv v ol ? ee i sink = 10 ma 200 mv v cc ? oh i source = 10 ma 500 mv capacitive load drive 350 pf power supply quiescent current 1.24 ma power supply rejection v s + = 3 v to 15 v 80 db notes 1 this is a functional specification. amplifier bandwidth decreases when the input common-mode voltage is driven in the range (+v s ?1 v) to +v s . common-mode error voltage is typically less than 5 mv with the common-mode voltage set at 1 v below the positive supply. 2 v ol ? ee is defined as the difference between the lowest possible output voltage (v ol ) and the negative voltage supply rail (v ee ). v cc ? oh is defined as the difference between the highest possible output voltage (v oh ) and the positive supply voltage (v cc ). specifications subject to change without notice.
rev. e ? ad822 caution esd (electrostatic discharge) sensitive device. electrostatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge without detection. although the ad822 features proprietary esd protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. therefore, proper esd precautions are recommended to avoid performance degradation or loss of functionality. absolute maximum ratings 1 supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 v internal power dissipation 2 plastic dip (n) . . . . . . . . . . . . . . . observe derating curves soic (r) . . . . . . . . . . . . . . . . . . . observe derating curves input voltage . . . . . . . . . . . . . . (+v s + 0.2 v) to ?20 v + v s ) output short circuit duration . . . . . . . . . . . . . . . . indefinite differential input voltage . . . . . . . . . . . . . . . . . . . . . . . 30 v storage temperature range (n) . . . . . . . . . ?5 c to +125 c storage temperature range (r, rm) . . . . . ?5 c to +150 c operating temperature range ad822a/ad822b . . . . . . . . . . . . . . . . . . . ?0 c to +85 c lead temperature range (soldering, 60 sec) . . . . . . . . 260 c notes 1 stresses above those listed under absolute maximum ratings may cause perma- nent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 8-lead plastic dip package: ja = 90 c/w 8-lead soic package: ja = 160 c/w 8-lead msop package: ja = 190 c/w ordering guide model * temperature range package description package option branding information ad822an ?0 c to +85 c 8-lead pdip n-8 ad822ar ?0 c to +85 c 8-lead soic r-8 ad822arm ?0 c to +85 c 8-lead msop rm-8 b4a ad822br ?0 c to +85 c 8-lead soic r-8 * spice model is available at www.analog.com. maximum power dissipation the maximum power that can be safely dissipated by the ad822 is limited by the associated rise in junction temperature. for plastic packages, the maximum safe junction temperature is 145 c. if these maximums are exceeded momentarily, proper circuit opera- tion w ill be restored as soon as the die temperature is reduced. leaving the device in the ?verheated?condition for an extended period can result in device burnout. to ensure proper operation, it is important to observe the derating curves shown in tpc 24. while the ad822 is internally short circuit protected, this may not be sufficient to guarantee that the maximum junction tempera- ture is not exceeded under all conditions. with power supplies 12 v (or less) at an ambient temperature of 25 c or less, if the output node is shorted to a supply rail, then the amplifier will not be destroyed, even if this condition persists for an extended period.
rev. e ad822 ? offset voltage ? mv 70 0 ?0.5 ?0.4 number of units ?0.3 ?0.2 ?0.1 0 60 50 40 30 20 10 0.1 0.2 0.3 0.4 0.5 v s = 0v, 5v tpc 1. typical distribution of offset voltage (390 units) v s = 5v v s = 15v offset voltage drift ? v/ c 16 6 0 ?12 10 ?10 % in bin ?8 ?6 ?4 ?2 02468 14 8 4 2 12 10 tpc 2. typical distribution of offset voltage drift (100 units) input bias current ? pa 50 20 0 010 1 number of units 23456789 45 25 15 5 35 30 10 40 tpc 3. typical distribution of input bias current (213 units) t ypical performance characteristics common-mode voltage ? v 5 0 ?5 ?5 5 ?4 input bias current ? pa ?3 ?2 ?1 0 1 2 3 4 v s = 0v, +5v, and 5v v s = 5v tpc 4. input bias current vs. common-mode voltage; v s = 5 v, 0 v, and v s = 5 v common-mode voltage ? v 1k 100 0.1 ?16 16 ?12 input bias current ? pa ?8 ?4 0 4 8 12 10 1 tpc 5. input bias current vs. common-mode voltage; v s = 15 v temperature ? c 100k 0.1 20 140 40 input bias current ? pa 60 80 100 120 10k 1k 100 10 1 tpc 6. input bias current vs. temperature; v s = 5 v, v cm = 0
rev. e ? ad822 load resistance ? 10m 1m 10k 100 100k 0pen-loop gain ? v/v 100k v s = 0v, 3v v s = 15v v s = 0v, 5v 1k 10k tpc 7. open-loop gain vs. load resistance temperature ? c 10m 1m 10k ?60 140 ?40 open-loop gain ? v/v ?20 0 20 40 60 80 100 120 100k r l = 10k r l = 100k r l = 600 v s = 15v v s = 15v v s = 15v v s = 0v, 5v v s = 0v, 5v v s = 0v, 5v tpc 8. open-loop gain vs. temperature output voltage ? v 300 ?300 ?16 16 ?12 input voltage ? v ?8 ?4 0 4 8 12 200 100 0 ?100 ?200 r l = 10k r l = 600 r l = 100k tpc 9. input error voltage vs. output voltage for resistive loads output voltage from supply rails ? mv 40 20 ?40 0300 60 input voltage ? v 120 180 240 0 ?20 r l = 2k r l = 20k pos rail neg rail neg rail neg rail pos rail pos rail r l = 100k tpc 10. input error voltage with output voltage within 300 mv of either supply rail for various resistive loads; v s = 5 v frequency ? hz 1k 100 1 110k 10 100 1k 10 input voltage noise ? nv/ h z tpc 11. input voltage noise vs. frequency frequency ? hz ?40 ?50 ?110 100 100k 1k thd ? db 10k ?70 ?80 ?90 ?100 ?60 r l = 10k a cl = ?1 v s = 0v, 5v; v out = 4.5v p-p v s = 5v; v out = 9v p-p v s = 15v; v out = 20v p-p v s = 0v, 3v; v out = 2.5v p-p tpc 12. total harmonic distortion vs. frequency
rev. e ad822 ? frequency ? hz 100 ?20 80 60 40 20 0 10 10m 100 open-loop gain ? db 1k 10k 100k 1m 100 ?20 80 60 40 20 0 phase margin in degrees phase gain c l = 100pf r l = 2k tpc 13. open-loop gain and phase margin vs. frequency frequency ? hz 1k 100 100 10m 1k output impedance ? 10k 100k 1m 10 1 a cl = +1 v s = 15v 0.1 0.01 tpc 14. output impedance vs. frequency settling time ? s 16 12 ?16 0.0 5.0 1.0 output swing from 0 to volts 2.0 3.0 4.0 0 ?4 ?8 ?12 8 4 1% 0.01% 1% 0.01% 0.1% error tpc 15. output swing and error vs. settling time 90 80 0 40 30 20 10 60 50 70 common-mode rejection ? db frequency ? hz 10m 100 1k 10k 100k 1m 10 v s = 15v v s = 0v, 3v v s = 0v, 5v tpc 16. common-mode rejection vs. frequency +125 c ?55 c +25 c positive rail negative rail common-mode voltage from supply rails ? v 5 4 0 ?1 3 common-mode error voltage ? mv 012 3 2 1 ?55 c +125 c tpc 17. absolute common-mode error vs. com- mon-mode voltage from supply rails (v s ?v cm ) load current ? ma 1000 100 0 0.001 100 0.01 output saturation voltage ? mv 0.1 1 10 10 v ol ? v s v s ? v oh tpc 18. output saturation voltage vs. load current
rev. e ?0 ad822 temperature ? c 1000 100 1 ?60 140 ?40 output saturation voltage ? mv ?20 0 20 40 60 80 100 120 10 i source = 10ma i sink = 10ma i source = 1ma i sink = 1ma i source = 10 a i sink = 10 a tpc 19. output saturation voltage vs. temperature temperature ? c 80 40 0 ?60 140 ?40 ?20 0 20 40 60 80 100 120 short circuit current limit ? ma 70 60 20 10 50 30 + ? ? + + v s = 15v v s = 15v v s = 0v, 5v v s = 0v, 3v v s = 0v, 3v v s = 0v, 5v ?out tpc 20. short circuit current limit vs. temperature total su pply voltage ? v 1600 0 036 4 quiescent current ? a 8121 620242832 1400 800 600 400 200 1200 1000 t = +125 c t = +25 c t = ?55 c tpc 21. quiescent current vs. supply voltage vs. temperature frequency ? hz 100 0 10 10m 100 power supply rejection ? db 1k 10k 100k 1m 90 60 30 20 10 80 70 50 40 ?psrr + psrr tpc 22. power supply rejection vs. frequency frequency ? hz 30 25 0 10k 10m 100k output voltage ? v 1m 20 15 10 5 v s = 15v r l = 2k v s = 0v, 3v v s = 0v, 5v tpc 23. large signal frequency response ambient temperature ? c 2.4 1.2 0.4 ?60 ?40 to ta l power dissipation ? w ?20 0 20 40 60 80 2.2 1.4 1.0 0.6 1.8 1.6 0.8 2.0 0.2 0.0 8-lead pdip 8-lead soic 8-lead msop tpc 24. maximum power dissipation vs. temperature for plastic packages
rev. e ad822 ?1 frequency ? hz ?70 ?140 300 1m 1k crosstalk ? db 3k 10k 30k 100k 300k ?80 ?100 ?110 ?120 ?130 ?90 tpc 25. crosstalk vs. frequency 1/2 ad822 8 4 v in +v s r l 0.01 f v out 0.01 f 100pf tpc 26. unity gain follower 0% 100 90 10 5v 10s tpc 27. 20 v p-p, 25 khz sine wave input; unity gain follower; r l = 600 w , v s = 15 v 0.1 f 1 f 0.1 f 1 f +v s 1/2 ad822 1/2 ad822 20v p-p 2 3 8 17 5 6 20k 2.2k 5k 5k ?v s v out v in crosstalk = 20log v out 10v in tpc 28. crosstalk test circuit 0% 100 90 10 5v 5s tpc 29. large signal response unity gain follower; v s = 15 v, r l = 10 k w 10 0% 100 90 10mv 500ns tpc 30. small signal response unity gain follower; v s = 15 v, r l = 10 k w
rev. e ?2 ad822 10 0% 100 90 gnd 1v 2s tpc 31. v s = 5 v, 0 v; unity gain follower response to 0 v to 4 v step 1/2 ad822 8 4 v in +v s r l 0.01 f v out 100pf tpc 32. unity gain follower 0.01 f v out +v s 1/2 ad822 8 20k v in 10k 4 r l 100pf tpc 33. gain-of-t2 inverter 10 0% 100 90 gnd 2s 1v tpc 34. v s = 5 v, 0 v; unity gain follower response to 0 v to 5 v step 10 0% 100 90 gnd 10mv 2s tpc 35. v s = 5 v, 0 v; unity gain follower response, to 40 mv step centered 40 mv above ground, r l = 10 k w 10 0% 100 90 gnd 10mv 2s tpc 36. v s = 5 v, 0 v; gain-of-2 inverter response to 20 mv step, centered 20 mv below ground, r l = 10 k w
rev. e ad822 ?3 10 0% 100 90 gnd 1v 2s tpc 37. v s = 5 v, 0 v; gain-of-2 inverter response to 2.5 v step centered ?.25 v below ground, r l = 10 k w 10 0% 100 90 gnd 500mv 10s tpc 38. v s = 3 v, 0 v; gain-of-2 inverter, v in = 1.25 v, 25 khz, sine wave centered at ?.75 v, r l = 600 w application notes input characteristics in the ad822, n-channel jfets are used to provide a low off set, low noise, high impedance input stage. minimum input com- mon-mode voltage extends from 0.2 v below ? s to 1 v less than +v s . driving the input voltage closer to the positive rail will cause a loss of amplifier bandwidth (as can be seen by com- paring the large signal responses shown in tpcs 31 and 34) and increased common-mode voltage error as illustrated in tpc 17. the ad822 does not exhibit phase reversal for input voltages up to and including +v s . tpc 39a shows the response of an ad822 voltage follower to a 0 v to 5 v (+v s ) square wave input. the input and output are superimposed. the output tracks the input up to +v s without phase reversal. the reduced bandwidth above a 4 v input causes the rounding of the output waveform. for input voltages greater than +v s , a resistor in series with the ad822? 90 100 10 0% . . . . . . . . . . . .. . . .. . . .. . . . . . . . . . . .. . . .. . . . . . . . . . . . . . . .. . . .. . . .. . . . . . . . . . . .. . . .. . . . (b) gnd 90 100 10 0% . . . . . . . . . . . .. . . .. . . .. . . . . . . . . . . .. . . .. . . . . . . . . . . . . . . .. . . .. . . .. . . . . . . . . . . .. . . .. . . . (a) gnd v in v out 5v r p +v s 1v 10s 1v 1v 10s 1v 1v tpc 39. (a) response with r p = 0; v in from 0 to +v s (b) v in = 0 to +v s + 200 mv v out = 0 to +v s r p = 49.9 k w noninverting input will prevent phase reversal, at the expense of greater input voltage noise. this is illustrated in tpc 39b. since the input stage uses n-channel jfets, input current during normal operation is negative; the current flows out from the input terminals. if the input voltage is driven more positive than +v s ?0.4 v, the input current will reverse direction as internal de vice junctions become forward biased. this is illustrated in tpc 4. a current limiting resistor should be used in series with the input of the ad822 if there is a possibility of the input voltage exceeding the positive supply by more than 300 mv, or if an input voltage will be applied to the ad822 when v s = 0. the amplifier will be damaged if left in that condition for more than 10 seconds. a 1 k w resistor allows the amplifier to withstand up to 10 v of continuous overvoltage and increases the input volt- age noise by a negligible amount.
rev. e ?4 ad822 input voltages less than ? s are a completely different story. the amplifier can safely withstand input voltages 20 v below the negative supply voltage as long as the total voltage from the positive supply to the input terminal is less than 36 v. in addi tion, the input stage typically maintains picoamp level input currents across that input voltage range. the ad822 is designed for 13 nv/ hz wideband input voltage noise and maintains low noise performance to low frequencies (refer to tpc 11). this noise performance, along with the ad822? low input current and current noise, means that the ad822 contributes negligible noise for applications with source resistances greater than 10 k w and signal bandwidths greater than 1 khz. this is illustrated in figure 3. 100k 0.1 input voltage noise ? v 10k 1k 100 10 1 whenever johnson noise is greater than amplifier noise, amplifier noise can be considered negligible for application. 1khz resistor johnson noise amplifier-generated noise 10hz 10k 100k 1m 10m 100m 1g 10g source impedance ? figure 3. total noise vs. source impedance output characteristics the ad822? unique bipolar rail-to-rail output stage swings within 5 mv of the negative supply and 10 mv of the positive supply with no external resistive load. the ad822? approxi- mate output saturation resistance is 40 w sourcing and 20 w sinking. this can be used to estimate output saturation voltage when driving heavier current loads. for instance, when sourcing 5 ma, the saturation voltage to the positive supply rail will be 200 mv; when sinking 5 ma, the saturation voltage to the nega- tive rail will be 100 mv. the amplifier? open-loop gain characteristic will change as a function of resistive load, as shown in tpcs 7 to 10. for load resistances over 20 k w , the ad822? input error voltage is virtu- ally unchanged until the output voltage is driven to 180 mv of either supply. if the ad822? output is overdriven so as to saturate either of the output devices, the amplifier will recover within 2 m s of its input returning to the amplifier? linear operating region. direct capacitive loads will interact with the amplifier? effective output impedance to form an additional pole in the amplifier? feedback loop, which can cause excessive peaking on the pulse response or loss of stability. worst case is when the amplifier is used as a unity gain follower. figure 4 shows the ad822? pulse response as a unity gain follower driving 350 pf. this amount of overshoot indicates approximately 20 degrees of phase mar- gin?he system is stable but is nearing the edge. configurations with less loop gain, and as a result less loop bandwidth, will be much less sensitive to capacitance load effects. 90 . . . . . . . . . . . .. . . .. . . .. . . . . . . . . . . .. . . .. . . . . . . . . . . . . . . .. . . .. . . .. . . . . . . . . . . .. . . .. . . . 100 0% 10 20mv 2s figure 4. small signal response of ad822 as unity gain follower driving 350 pf figure 5 is a plot of capacitive load that will result in a 20 phase margin versus noise gain for the ad822. noise gain is the inverse of the feedback attenuation factor provided by the feedback network in use. 1 2 3 4 5 300 1k 3k 10k 30k capacitive load for 20 o phase margin ? pf noise gain ? 1+ ???? r 1 r f r1 r f c l figure 5. capacitive load tolerance vs. noise gain figure 6 shows a method for extending capacitance load drive capability for a unity gain follower. with these component val- ues, the circuit will drive 5,000 pf with a 10% overshoot. +v s v out v in 20pf 8 4 1/2 ad822 0.01 f 100 20k 0.01 f c l ?v s figure 6. extending unity gain follower capacitive load capability beyond 350 pf
rev. e ad822 ?5 applications single-supply voltage-to-frequency converter the circuit shown in figure 7 uses the ad822 to drive a low power timer that produces a stable pulse of width t 1 . the posi- tive going output pulse is integrated by r1?1 and used as one input to the ad822 that is connected as a differential integrator. the other input (nonloading) is the unknown voltage, v in . the ad822 output drives the timer trigger input, closing the overall feedback loop. +10v c5 0.1 f u4 ref02 v ref = 5v r scale ** 10k 2 3 4 6 5 cmos 74hco4 u3a u3b c3 0.1 f 1 2 3 4 out2 out1 0.01 f, 2 % r2 499k 1% u1 c1 r3 * 1 16k 1/2 ad822b u2 cmos 555 thr tr dis gnd out cv rv+ 1 2 3 4 5 6 7 8 499k 1% r1 v in c2 0.01 f, 2 % 0v to 2.5v full scale c4 0.01 f notes f out = v in /(v ref t 1 ), t 1 = 1.1 r3 c6 = 25khz f s as shown * = 1% metal film, <50ppm/ c tc ** = 10% 20t film, <100ppm/ c tc t 1 = 33 s for f out = 20khz @ v in = 2.0v figure 7. single-supply voltage-to-frequency converter typical ad822 bias currents of 2 pa allow megohm-range source impedances with negligible dc errors. linearity errors on the order of 0.01% full scale can be achieved with this circuit. this performance is obtained with a 5 v single supply that delivers less than 1 ma to the entire circuit. single-supply programmable gain instrumentation amplifier the ad822 can be configured as a single-supply instrumenta- tion amplifier that is able to operate from single supplies down to 3 v or dual supplies up to 15 v. using only one ad822 rather than three separate op amps, this circuit is cost and power efficient. ad822 fet inputs?2 pa bias currents minimize offset errors caused by high unbalanced source impedances. an array of precision thin-film resistors sets the in amp gain to be either 10 or 100. these resistors are laser trimmed to ratio m atch to 0.01% and have a maximum differential tc of 5 ppm/ c. table i. in amp performance parameters v s = 3 v, 0 v v s = 65 v cmrr 74 db 80 db common-mode voltage range ?.2 v to +2 v ?.2 v to +4 v 3 db bw, g = 10 180 khz 180 khz g = 100 18 khz 18 khz t settling 2 v step (v s = 0 v, 3 v) 2 m s 5 v (v s = 5 v) 5 m s noise @ f = 1 khz, g = 10 270 nv/ hz 270 nv/ hz g = 100 2.2 m v/ hz 2.2 m v/ hz i supply (total) 1.10 ma 1.15 ma 90 100 10 0% . . . . . . . . . . . . .. . . .. . . .. . . . . . . . . . . .. . . .. . . . . . . . . . . . . . . .. . . .. . . .. . . . . . . . . . . .. . . .. . . . 1v 5s figure 8a. pulse response of in amp to a 500 mv p-p input signal; v s = 5 v, 0 v; gain = 10 v out ohmtek part # 1043 r6 90k r5 9k r4 1k r3 1k r2 9k r1 90k v ref v in1 v in2 g = 100 g = 100 g = 10 g = 10 1/2 ad822 1/2 ad822 +v s 0.1 f r p 1k r p 1k 1 2 3 4 5 6 7 (g = 10) v out = (v in1 ? v in2 ) 1+ ???????? +v ref r6 r4 + r5 (g = 100) v out = (v in1 ? v in2 ) 1+ ???????? +v ref r4 r5 + r6 figure 8b. a single-supply programmable instrumentation amplifier
rev. e ?6 ad822 3 v, single-supply stereo headphone driver the ad822 exhibits good current drive and thd + n perfor- mance, even at 3 v single supplies. at 1 khz, total harmonic distortion plus noise (thd + n) equals ?2 db (0.079%) for a 300 mv p-p output signal. this is comparable to other single- supply op amps that consume more power and cannot run on 3v power supplies. 95.3k l 0.1 f 1/2 ad822 1/2 ad822 0.1 f 1 f 1 f 500 f 500 f 47.5k 47.5k 10k 10k 4.99k 95.3k r headphones 32 impedance 3v mylar mylar channel 1 channel 2 + 4.99k figure 9. 3 v single-supply stereo headphone driver in figure 9, each channel? input signal is coupled via a 1 m f mylar capacitor. resistor dividers set the dc voltage at the noninverting inputs so that the output voltage is midway between the power supplies (1.5 v). the gain is 1.5. each half of the ad822 can then be used to drive a headphone channel. a 5 hz high-pass filter is realized by the 500 m f capacitors and the headphones that can be modeled as 32 w load resistors to ground. this ensures that all signals in the audio frequency range (20 hz to 20 khz) are delivered to the headphones. low dropout bipolar bridge driver the ad822 can be used for driving a 350 w wheatstone bridge. figure 10 shows one half of the ad822 being used to buffer the ad589? 1.235 v low power reference. the output of 4.5 v can be used to drive an a/d converter front end. the other half of the ad822 is configured as a unity gain inverter and gener ates the other bridge input of ?.5 v. resistors r1 and r2 provide a constant current for bridge excitation. the ad620 low power instrumentation amplifier is used to condition the differential output voltage of the bridge. the gain of the ad620 is pro- grammed using an external resistor rg and determined by: g k r g =+ 49 4 1 . w +1.235v 49.9k +v s 1/2 ad822 ad620 1/2 ad822 to a/ d converter reference input r1 20 25.4k 1% 10k 1% 350 350 350 350 r g ad589 10k 1% 10k 1% r2 20 ?v s ?4.5v +v s ?v s gnd 0.1 f 0.1 f 1 f 1 f +5v ?5v v ref ?v s ++ ++ +v s figure 10. low dropout bipolar bridge driver
rev. e ad822 ?7 outline dimensions 8-lead plastic dual-in-line package [pdip] (n-8) dimensions shown in inches and (millimeters) seating plane 0.015 (0.38) min 0.180 (4.57) max 0.150 (3.81) 0.130 (3.30) 0.110 (2.79) 0.060 (1.52) 0.050 (1.27) 0.045 (1.14) 8 1 4 5 0.295 (7.49) 0.285 (7.24) 0.275 (6.98) 0.100 (2.54) bsc 0.375 (9.53) 0.365 (9.27) 0.355 (9.02) 0.150 (3.81) 0.135 (3.43) 0.120 (3.05) 0.015 (0.38) 0.010 (0.25) 0.008 (0.20) 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) controlling dimensions are in inches; millimeter dimensions (in parentheses) are rounded-off inch equivalents for reference only and are not appropriate for use in design compliant to jedec standards mo-095aa 8-lead standard small outline package [soic] narrow body (r-8) dimensions shown in millimeters and (inches) 0.25 (0.0098) 0.19 (0.0075) 1.27 (0.0500) 0.41 (0.0160) 0.50 (0.0196) 0.25 (0.0099) 45 8 0 1.75 (0.0688) 1.35 (0.0532) seating plane 0.25 (0.0098) 0.10 (0.0040) 85 4 1 5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497) 1.27 (0.0500) bsc 6.20 (0.2440) 5.80 (0.2284) 0.51 (0.0201) 0.33 (0.0130) coplanarity 0.10 controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design compliant to jedec standards ms-012aa 8-lead microsoic package [msop] (rm-8) dimensions shown in millimeters 0.23 0.08 0.80 0.40 8 0 85 4 1 4.90 bsc pin 1 0.65 bsc 3.00 bsc seating plane 0.15 0.00 0.38 0.22 1.10 max 3.00 bsc compliant to jedec standards mo-187aa coplanarity 0.10
rev. e ?8 ad822 revision history location page 1/03?ata sheet changed from rev. d to rev. e edits to specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 edits to figure 10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 updated outline dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 10/02?ata sheet changed from rev. c to rev. d edits to features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 edits to ordering guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 updated soic package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 8/02?ata sheet changed from rev. b to rev. c all figures updated . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . global edits to features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 updated all package outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 7/01?ata sheet changed from rev. a to rev. b all figures updated . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . global cerdip references removed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1, 6, and 18 additions to product description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 8-lead soic and 8-lead msop diagrams added . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 deletion of ad822s column . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 edits to absolute maximum ratings and ordering guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 removed metalization photograph . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
?9
c00874??/03(e) printed in u.s.a. ?0

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